in the LPC2000 portable Files for every Compiler we find in the port.c file:

static void prvSetupTimerInterrupt( void )
{
unsigned portLONG ulCompareMatch;

/* A 1ms tick does not require the use of the timer prescale. This is
defaulted to zero but can be used if necessary. */
T0_PR = portPRESCALE_VALUE;

/* Calculate the match value required for our wanted tick rate. */
ulCompareMatch = configCPU_CLOCK_HZ / configTICK_RATE_HZ;

/* Protect against divide by zero. Using an if() statement still results
in a warning - hence the #if. */
#if portPRESCALE_VALUE != 0
{
ulCompareMatch /= portPRESCALE_VALUE;
ERROR: -> xxxxxxxxxxxxxxxxxxxxxxx
}
#endif



because in the manual is written:

The Prescale
Counter is incremented on every pclk. When it reaches the value stored in the Prescale Register, the Timer Counter is
incremented and the Prescale Counter is reset on the next pclk. This causes the TC to increment on every pclk when PR = 0,
every 2 pclks when PR = 1, etc.

so it should be:

ulCompareMatch /= portPRESCALE_VALUE+1;

Thanks for the correction. FreeRTOS V4.0.0 will be out in a couple of weeks, I will make the mod.

Regards.

I believe there is another error (off-by-one) in Timer0Setup, but it is very small for typical LPC peripheral clock rates.

Currently, the Timer0 match register (MR0) is set as follows:

T0_PR = portPRESCALE_VALUE;

/* Calculate the match value required for our wanted tick rate. */
ulCompareMatch = configPCLK_HZ / configTICK_RATE_HZ;

/* Protect against divide by zero. Using an if() statement still results
in a warning - hence the #if. */
#if portPRESCALE_VALUE != 0
{
ulCompareMatch /= ( portPRESCALE_VALUE + 1 );
}
#endif
T0_MR0 = ulCompareMatch;

According to the LPC213x data sheets, the timer/counter resets to zero at then end of the match, so the total number of timer/counter ticks will be (T0_MR0 + 1) (except when T0_MR0 is 0). As a quick test, I used T1_MR0 with a prescaler such that the timer1 ticked at 1 Hz, and set the T1_MR0 register to 1 to verify that the reset happens after the match value has completed its cycle.

To fix this, T0_MR0 should be set as follows:

T0_MR0 = ulCompareMatch - 1;

Note that I did not include a check for validity of the final result (ie. non-zero match register) in the above assignment, but that some form of error reporting should be included there.

I just found that this off-by-one error for T0_MR0 found by Patrick is still in the current 5.2.0 LPC200 port.

When fixing, I also suggest to simplify the function to:

/* A 1ms tick does not require the use of the timer prescale. This is
defaulted to zero but can be used if necessary. */
T0_PR = portPRESCALE_VALUE;

/* Calculate the match value required for our wanted tick rate. */
ulCompareMatch = configCPU_CLOCK_HZ / configTICK_RATE_HZ / (portPRESCALE_VALUE + 1) - 1;

T0_MR0 = ulCompareMatch;

The #if portPRESCALE_VALUE != 0 is not needed because it is incremented by one anyway. Maybe check it against beeing -1.

Regards,
Oliver