Hi I have done One project in AT91SAM7X256 using FreeRTOS, Eclipse and GCC tool chain. I want to port AT91SAM7S256 using FreeRTOS, Eclipse and GCC tool chain but I am facing problem in boot.s, Port macro.c, Portisr.c file modifying. I didnot find any demo prject for AT91SAM7S256.
So Pl. Guide me

I only did this once and it was easy. As far as I can remember you only need to replace the AT91SAM7X256.h and lib_AT91SAM7X256.h header files with the 7S ones. Depending on any demo code, this will cause a lot of compile errors because some peripherals have different names or do not exist. You will need to work through these and make the required changes.

Perhaps you should check the memory definitions in the *.ld file and the vector table in boot.s but I think they should be OK as they are.

Hi incrediball,
i have copied AT91SAM7X256.h and lib_AT91SAM7X256.h.but i am getting error as i have attached here which is from boot.s.
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
Severity and DescriptionPathResourceLocationCreation TimeId
undefined reference to `__bss_beg__'encoderboot.sline 11812465324187819214
undefined reference to `__data_beg__'encoderboot.sline 11812465324187819215
undefined reference to `__data_beg_src__'encoderboot.sline 11812465324187819216
undefined reference to `__data_end__'encoderboot.sline 11812465324187819217
undefined reference to `__stack_end__'encoderboot.sline 11812465324187819218
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
my boot.s is as below
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;

/* */

.extern main
.extern exit
.extern AT91F_LowLevelInit
.extern vPortYieldProcessor

.text
.code 32


.align 0

.extern __stack_end__
.extern __bss_beg__
.extern __bss_end__
.extern __data_beg__
.extern __data_end__
.extern __data+beg_src__

.global start
.global endless_loop

/* Stack Sizes */
.set UND_STACK_SIZE, 0x00000004
.set ABT_STACK_SIZE, 0x00000004
.set FIQ_STACK_SIZE, 0x00000004
.set IRQ_STACK_SIZE, 0X00000400
.set SVC_STACK_SIZE, 0x00000400

/* Standard definitions of Mode bits and Interrupt (I & F) flags in PSRs */
.set MODE_USR, 0x10 /* User Mode */
.set MODE_FIQ, 0x11 /* FIQ Mode */
.set MODE_IRQ, 0x12 /* IRQ Mode */
.set MODE_SVC, 0x13 /* Supervisor Mode */
.set MODE_ABT, 0x17 /* Abort Mode */
.set MODE_UND, 0x1B /* Undefined Mode */
.set MODE_SYS, 0x1F /* System Mode */

.equ I_BIT, 0x80 /* when I bit is set, IRQ is disabled */
.equ F_BIT, 0x40 /* when F bit is set, FIQ is disabled */


start:
_start:
_mainCRTStartup:

/* Setup a stack for each mode - note that this only sets up a usable stack
for system/user, SWI and IRQ modes. Also each mode is setup with
interrupts initially disabled. */
ldr r0, .LC6
msr CPSR_c, #MODE_UND|I_BIT|F_BIT /* Undefined Instruction Mode */
mov sp, r0
sub r0, r0, #UND_STACK_SIZE
msr CPSR_c, #MODE_ABT|I_BIT|F_BIT /* Abort Mode */
mov sp, r0
sub r0, r0, #ABT_STACK_SIZE
msr CPSR_c, #MODE_FIQ|I_BIT|F_BIT /* FIQ Mode */
mov sp, r0
sub r0, r0, #FIQ_STACK_SIZE
msr CPSR_c, #MODE_IRQ|I_BIT|F_BIT /* IRQ Mode */
mov sp, r0
sub r0, r0, #IRQ_STACK_SIZE
msr CPSR_c, #MODE_SVC|I_BIT|F_BIT /* Supervisor Mode */
mov sp, r0
sub r0, r0, #SVC_STACK_SIZE
msr CPSR_c, #MODE_SYS|I_BIT|F_BIT /* System Mode */
mov sp, r0

/* We want to start in supervisor mode. Operation will switch to system
mode when the first task starts. */
msr CPSR_c, #MODE_SVC|I_BIT|F_BIT

blAT91F_LowLevelInit

/* Clear BSS. */

mov a2, #0/* Fill value */
movfp, a2/* Null frame pointer */
movr7, a2/* Null frame pointer for Thumb */

ldrr1, .LC1/* Start of memory block */
ldrr3, .LC2/* End of memory block */
subsr3, r3, r1 /* Length of block */
beq.end_clear_loop
movr2, #0

.clear_loop:
strbr2, [r1], #1
subsr3, r3, #1
bgt.clear_loop

.end_clear_loop:

/* Initialise data. */

ldrr1, .LC3/* Start of memory block */
ldrr2, .LC4/* End of memory block */
ldrr3, .LC5
subsr3, r3, r1/* Length of block */
beq.end_set_loop

.set_loop:
ldrbr4, [r2], #1
strbr4, [r1], #1
subsr3, r3, #1
bgt.set_loop

.end_set_loop:

movr0, #0 /* no arguments */
movr1, #0 /* no argv either */

ldr lr, =main
bxlr

endless_loop:
b endless_loop


.align 0

.LC1:
.word __bss_beg__
.LC2:
.word __bss_end__
.LC3:
.word __data_beg__
.LC4:
.word __data_beg_src__
.LC5:
.word __data_end__
.LC6:
.word __stack_end__


/* Setup vector table. Note that undf, pabt, dabt, fiq just execute
a null loop. */

.section .startup,"ax"
.code 32
.align 0

b _start/* reset - _start*/
ldr pc, _undf/* undefined - _undf*/
ldr pc, _swi/* SWI - _swi*/
ldr pc, _pabt/* program abort - _pabt*/
ldr pc, _dabt/* data abort - _dabt*/
nop/* reserved*/
ldr pc, [pc,#-0xF20]/* IRQ - read the AIC*/
ldr pc, _fiq/* FIQ - _fiq*/

_undf: .word __undf /* undefined*/
_swi: .word vPortYieldProcessor /* SWI*/
_pabt: .word __pabt /* program abort*/
_dabt: .word __dabt /* data abort*/
_fiq: .word __fiq /* FIQ*/

__undf: b . /* undefined*/
__pabt: b . /* program abort*/
__dabt: b . /* data abort*/
__fiq: b . /* FIQ*/

This is because you have no `__bss_beg__' , `__data_beg_src__' , `__data_end__', `__stack_end__' symbols defined, but your boot.s tries to export them at the beggining of the file.

These symbols should be defined in linker command (usually *.ld) file.

I'm confused. You say you have "done" a AT91SAM7X256 project, which I assume means that it compiles. The boot.s file in the AT91SAM7X256 demos have those symbols as well, so you must have removed something important. Those symbols are not 7X specific anyway.

You also say that you have copied AT91SAM7X256.h and lib_AT91SAM7X256.h. But I thought you want to create a 7S project and not a 7X one. You need to REPLACE the 7X headers with the 7S headers. But it helps if the 7X project compiles to start with.

hi incrediball,
it was by mistake written 7X in plase of 7S.Anyway problem has been solve wew have modefied also its *.ld but finally we have used same .ld file as we have used in 7X project.and project has been sucsesfully build thaks incrediball and aturowski for your supports.

Hi .
i have build my project sucsessfully in AT91SAM7S256.But right now my project is aboarted When i am starting "vTaskscheduler();"i have tried to debuge inside that it is stopping its executon from (inTask.c ) if(xPortStartSchedular()).so is there any body have solution for this

Make sure the micro is in Supervisor mode before starting the kernel.

Hi davedoors,
how could i check micro is in supervisor mode or not.