Hi, I'm completely new to FreeRTOS and I'm trying to study it to understand if it fits my needs for my application. My idea is to use it on a Zynq board, so with a dual core ARM, building an AMP system with two FreeRTOS instances running at the same time. However, I need also strict synchronization between their tasks. From Xilinx notes, I saw that for bare metal applications the standard way to synchronize two cores is using polling on some shared variables in the OCM, but of course I don't like busy waiting. Is there a standard/suggested way to synchronize two instances of FreeRTOS? Of course also suggestions on a different approach to use both cores is welcome.
Thanks in advance.

With AMP, since it is asymetric, you can't just try to treat things as symetric and get things to work. An AMP system tends to be designed as mostly independent systems with a defined protocal between them.

Shared variables are ok for sending data between processors, but isn't good for sending syncronization between them. For that I would build on something based on the inter-processor interrupt, so one processor, so one processor sets up information in the shared memory, and then sends an interrupt to the other processer. The interrupt code in the second processor perhaps looks at parts of the data, and then signals to the appropriate syncronizing primitives in its OS, that tasks could be waiting on.

Thank you for your valuable suggestion. Probably this is not the best place where to answer, but what about the Xilinx OpenAMP framework? It is well integrated, reliable and efficient in FreeRTOS to your experience? Because at this point, if the synchronization between cores would be too tricky to be implemented from scratches, I'm thinking to adopt a linux/freertos solution to use both cores with an already developed framework.

The Xilinx OpenAMP code is definitely one approach you could take, although it is intended for Linux to FreeRTOS comms, and may be a bit heavy for FreeRTOS to FreeRTOS comms.

We have implemented some light weight event driven AMP systems using thread safe circular buffers and direct to task notifications. There are several approaches that can be taken - but the basis is the same for all approaches; one core buffers some data then generates an interrupt in the other core, the ISR uses a direct to task notification to unblock a task that reads the data from the buffer and processes as necessary. Simple and light weight.

Thank you, this is exactly the kind of information I was looking for, very clear!