FreeRTOS Support Archive
The FreeRTOS support forum is used to obtain active support directly from Real
Time Engineers Ltd. In return for using our top quality software and services for
free, we request you play fair and do your bit to help others too! Sign up
to receive notifications of new support topics then help where you can.
This is a read only archive of threads posted to the FreeRTOS support forum.
The archive is updated every week, so will not always contain the very latest posts.
Use these archive pages to search previous posts. Use the Live FreeRTOS Forum
link to reply to a post, or start a new support thread.
[FreeRTOS Home] [Live FreeRTOS Forum] [FAQ] [Archive Top] [November 2015 Threads]
The ARM documentation lists three System Handler Priority Registers: SHPR1, SHPR2, SHPR3. SHPR3, the register controlling SysTick and PendSV, is at address 0xe000ed20.
Address 0xe000ed20, however, is defined in FreeRTOS 8.2.3 as portNVICSYSPRI2REG. Is the intent of the #define to reflect the register's ordinality (SYSPRI3 ??). If so, it would be more accurate to call this macro portNVICSYSPRI3REG.
Code maintainers please note.
I've just been looking at this.
As you say there are three such registers, and they appear in order at addresses 0xe000ed18, 0xe000ed1c and 0xe000ed20.
The lines...
portNVICSYSPRI2REG |= portNVICPENDSVPRI;
portNVICSYSPRI2REG |= portNVICSYSTICKPRI;
...are, as you say writing to 0xe000ed20. If 0xe000ed18 is syspri 0, 0xe000ed1c is syspri 1, then 0xe000ed20 would be syspri 2.
I cannot see the name SHPR3 being used in the Cortex-M technical reference manual. Where does that register name come from?
Copyright (C) Amazon Web Services, Inc. or its affiliates. All rights reserved.